Multi-Core Processor Training Offered by Intel

Intel is offering an updated and expanded series of software developer trainings in parallel programming using the Intel® Xeon PhiTM coprocessor.

This series of offerings provides software developers the foundation needed for modernizing their codes to extract more of the parallel compute performance potential found in both Intel® Xeon® processors and Intel Xeon Phi coprocessors.

The session will cover:

• An overview of parallel programming frameworks and optimization guidelines for multi-core CPUs (Intel Xeon) and many-core coprocessors (Intel Xeon Phi)
• Discussions about three layers of parallelism: SIMD, Threads, Cluster environment
• Tips for quick porting/development of HPC software applications
• Real-life examples of code and optimization techniques
• Hardware solution and corresponding software implementations, APIs, and frameworks

Register for CDT 101 and/or one of the two CDT 102 events (CDT is limited to 16, so we offer two of them), use Chris Allison as the Intel Contact when registering. Registration in CDT 102 requires completion of CDT 101.

• Register for Ames CDT 101: April 21
• Register for Ames CDT 102: April 22
• Register for Ames CDT 102: April 23